|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH Integrated Device Technology, Inc. IDT74FST163232 ADVANCE INFORMATION FEATURES: * Bus switches provide zero delay paths * Extended commercial range of -40C to +85C * Low switch on-resistance: FST163xxx - 4 * TTL-compatible input and output levels * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Available in SSOP, TSSOP and TVSOP DESCRIPTION: The FST163232 belong to IDT's family of Bus switches. Bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink or source capability. Thus they generate little or no noise of their own while providing a low resistance path for an external driver. These devices connect input and output ports through an n-channel FET. When the gate-to-source junction of this FET is adequately forward-biased the device conducts and the resistance between input and output ports is small. Without adequate bias on the gate-to-source junction of the FET, the FET is turned off, therefore with no VCC applied, the device has hot insertion capability. The low on-resistance and simplicity of the connection between input and output ports reduces the delay in this path to close to zero. The FST163232 provides three 16-bit TTL- compatible ports that support 2:1 multiplexing. The S0,1 pins control mux select and switch enable/disable. The S0,1 inputs are synchronous and clocked on the rising edge of CLK when CLKEN is low. Port A can be connected to port B1 or port B2 or both ports B1 and B2. FUNCTIONAL BLOCK DIAGRAM CLKEN CLK S0 D CE CLK S1 D CE CLK 1A 1 of 16 Channels 1B1 1B2 PIN DESCRIPTION Pin Names A B1, B2 S0,1 CLK I/O I/O I/O I I I Description Bus A Buses B1, B2 Control Pins Clock Input. Clocks S0,1 on Rising Edge Clock Enable Input 3511 tbl 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. 3511 drw 01 CLKEN COMMERCIAL TEMPERATURE RANGE (c)1997 Integrated Device Technology, Inc. FEBRUARY 1997 DSC-3511/2 1 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATION 1A 2B1 2B2 ABSOLUTE MAXIMUM RATINGS(1) 56 55 54 53 52 51 50 49 48 47 46 45 44 1B1 1B2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 SSOP/ TSSOP/TVSOP TOP VIEW Symbol Description VTERM(2) Terminal Voltage with Respect to GND TSTG Storage Temperature IOUT Maximum Continuous Channel Current Max. -0.5 to +7.0 -65 to +150 128 Unit V C mA 2A 3B1 3B2 3A 4B1 4B2 4A 5B1 5B2 5A 6B1 6B2 3511 tbl 02 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating condiitions for extended periods may affect reliability. 2. VCC, Control and Switch terminals. 6A 7B1 7B2 7A 8B1 8B2 CAPACITANCE(1) Symbol CIN CI/O Parameter Control Input Capacitance Switch Input/Output Capacitance Switch Off Conditions(2) Typ. Unit 4 pF pF 3511 tbl 03 8A GND VCC 9B1 9B2 GND Vcc 9A 10B1 10B2 SO56-1 SO56-2 SO56-3 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 NOTES: 1. Capacitance is characterized but not tested 2. TA = 25C, f = 1MHz, VIN = 0V, VOUT = 0V 10A 11B1 11B2 12A 13B1 13B2 FUNCTION TABLE S1 X L L H H S0 X L H L H CLK X 11A 12B1 12B2 CLKEN H L L L L Description Last state Disconnect A to B1 and A to B2 A to B1 or B1 to A A to B2 or B2 to A 3511 tbl 04 13A 14B1 14B2 14A 15B1 15B2 15A 16B1 16B2 16A S0 S1 3511 drw 02 CLK CLKEN 2 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 5.0V 10% Symbol VIH VIL II H II L IOZH IOZL IOS VIK RON Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Voltage High Impedance Output Current (3-State Output pins) Short Circuit Current Clamp Diode Voltage Switch On Resistance(4) VCC = Max., VO = GND(3) VCC = Min., IIN = -18mA VCC = Min. VIN = 0.0V ION = 64mA VCC = Min. VIN = 0.0V ION = 32mA VCC = Min. VIN = 2.4V ION = 15mA IOFF ICC Input/Output Power Off Leakage Quiescent Power Supply Current VCC = 0V, VIN or VO 4.5V VCC = Max., VIN = GND or VCC -- -- -- 0.1 1 3 A A 3511 tbl 05 Test Conditions(1) Guaranteed Logic HIGH for Control Inputs Guaranteed Logic LOW for Control Inputs VCC = Max. VCC = Max. VI = VCC VI = GND VO = VCC VO = GND Min. 2.0 -- -- -- -- -- -- -- -- -- -- Typ.(2) -- -- -- -- -- -- 300 -0.7 4 4 6 Max. -- 0.8 1 1 1 1 -- -1.2 7 7 15 Unit V V A A mA V NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Measured by voltage drop between ports at indicated current through the switch. 3 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open Enable Pin Toggling 50% Duty Cycle VCC = Max. Outputs Open CLK Pin Toggling (16 Switches Toggling) fi = 10MHz 50% Duty Cycle Min. -- -- Typ.(2) 0.5 30 Max. 1.5 40 Unit mA A/ MHz/ Switch mA VIN = VCC VIN = GND IC Total Power Supply Current (6) VIN = VCC VIN = GND VIN = 3.4 VIN = GND -- 4.8 6.4 -- 5.1 7.2 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fiN) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi = Input Frequency N = Number of Switches Toggling at fi All currents are in milliamps and all frequencies are in megahertz. 3511 tbl 06 SWITCHING CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 5.0V 10% Symbol tPLH tPHL tCEWS tCENH tBX tPZH tPZL tPHZ tPLZ |QCI| |QDCI| Description Data Propagation Delay A to B, B to A(3,4) Clock Enable Set-Up Time CLKEN to CLK Low-to-High Clock Enable Hold Time CLKEN to CLK Low-to-High Switch Multiplex Delay CLK to A, B Switch Turn on Delay CLK to A, B Switch Turn off Delay CLK to A, B Charge Injection, Typical(5,7) Differential Charge Injection, Typical (6,7) Condition(1) CL = 50pF RL = 500 Min.(2) -- Typ. -- -- -- 1.5 1.5 1.5 -- -- -- -- -- 1.5 0.5 Max. 0.25 -- -- 6.5 6.5 7 -- -- 3511 tbl 07 Unit ns ns ns ns ns ns pC NOTES: 1. See test circuit and waveforms. 2. Minimum limits guaranteed but not tested. 3. This parameter is guaranteed by design but not tested. 4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 2.5ns for 50pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay on the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side. 5. Measured at switch turn off, load = 50 pF in parallel with 10 M scope probe, VIN = 0.0 volts. 6. Measured at switch turn off through bus multiplexer, (e.g.- A to B1 = >A to B2), load = 50 pF in parallel with 10 M scope probe, VIN at A = 0.0 volts. Charge injection is reduced because the injection from the turn off of the A to B1 switch is compensated by the turn on of the A to B2 switch. 7. Characterized parameter. Not 100% tested. 4 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 7.0V SWITCH POSITION Test Open Drain Disable Low Enable Low All Other Tests Open 3511 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Switch Closed 3511 lnk 03 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3511 lnk 04 PULSE WIDTH tH LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V tREM 1.5V 3511 lnk 05 tSU tH PROPAGATION DELAY 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 3511 lnk 06 ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 1.5V tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 0V 3.5V 1.5V tPHZ 0.3V VOH tPLZ 0V 3.5V 0.3V VOL SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL CONTROL INPUT 3511 lnk 07 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns 5 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX FST 16 XX Temp. Range Device Type X Package PV PA PF Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 163232 16-Bit Synchronous 2:1 Mux 74 -40C to +85C 3511 ldrw 08 Integrated Device Technology, Inc. reserves the right to make changes to the specifications in this data sheet in order to improve design or performance and to supply the best possible product. Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA 95054-3090 6 Telephone: (408) 727-6116 FAX 408-492-8674 |
Price & Availability of IDT74FST163232PA |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |